dorsaVi Targets Q3 2026 Tape-Out for 180nm RRAM Test Chip

dorsaVi has qualified three RRAM material stacks compatible with standard foundry processes, paving the way for scalable 22nm RRAM production and advancing its wearable robotics and medical sensor ambitions.

  • Three RRAM stacks pass commercial foundry BEOL compatibility
  • 180nm test chip tape-out targeted for Q3 2026
  • 22nm design phase to start in H2 2027
  • Compute-in-memory integrated on 256Kb RRAM array
  • Technology enables low-power, autonomous edge AI sensors
An image related to Dorsavi Ltd
Image © middle. Logo © respective owner.

Major Materials Breakthrough Unlocks Scalable 22nm RRAM Production

dorsaVi Limited (ASX:DVL) has crossed a pivotal technical milestone by qualifying three distinct Resistive Random Access Memory (RRAM) material stacks for integration on standard commercial foundry Back-End-of-Line (BEOL) processes. This achievement removes a critical materials risk and positions the company to manufacture its RRAM technology at scale on existing CMOS production lines, a prerequisite for commercial viability.

Unlike niche memory technologies requiring bespoke fabrication, dorsaVi’s BEOL-compatible RRAM stacks survive the thermal and chemical rigours of standard foundry environments, allowing seamless layering atop conventional silicon wafers. This layered approach not only slashes capital expenditure barriers but also ensures the technology’s portability across semiconductor nodes, smoothing the path from the current 180nm test chip to the high-value 22nm node targeted for industrial and medical applications.

The company’s strategic decision to validate three material candidates rather than a single stack reduces single-point failure risk and grants engineering flexibility in final production selection. These stacks have demonstrated stable sub-1V switching, process cleanliness, and integration readiness for 1T1R memory architectures, collectively underpinning a robust manufacturing roadmap.

Phased Development Strategy Mitigates Risk Ahead of Tape-Out

dorsaVi’s phased approach starts with a 180nm test chip, set for tape-out at a Tier-1 commercial foundry in Q3 2026, serving as a critical validation gate for both materials and the integrated Compute-in-Memory (CIM) architecture. This intermediate step addresses integration challenges and yield optimisation before scaling to the 22nm node design phase slated for the second half of 2027.

The CIM macro, designed to run directly on a 256Kb RRAM array, executes neural network inference within the memory fabric itself, tackling the industry-wide "Memory Wall" where most compute energy is wasted shuttling data between processors and memory. This integration promises roughly an order of magnitude reduction in energy per inference and dramatically lowers decision latency; essential for wearable robotics and autonomous edge devices.

Such hardware advances align with dorsaVi’s broader Ultra Edge Intelligence strategy, evolving its FDA-cleared movement sensors from passive data streamers to autonomous, on-body inference nodes capable of real-time decision-making without cloud reliance. This leap is expected to impact sectors including exoskeletons, prosthetics, medical implants, and industrial robotics, where localized compute power and energy efficiency are paramount.

Commercial Implications and Market Opportunities

The transition to 22nm technology unlocks higher cell density, lower write voltages, and improved thermal robustness, enabling devices to operate reliably in demanding environments such as industrial robotics and medical implants. dorsaVi projects a 20–30% reduction in write voltage for battery-powered edge devices and a doubling of operational battery life, which could significantly enhance device usability and reduce maintenance overheads.

This development dovetails with dorsaVi’s recent DoD injury study renewal, which supports the company’s pivot towards exoskeleton intelligence and neuromorphic computing. Moreover, it builds on the modular hardware foundation launched earlier this month, designed to separate sensing, compute, and memory layers for ultra-low power robotics applications, further cementing dorsaVi’s positioning in the edge AI hardware market.

Next Steps and Commercialisation Pathway

With the 180nm test chip design and layout finalized, dorsaVi is preparing for formal design review in June 2026 ahead of tape-out. Concurrently, development wafers are in production to refine integration uniformity. Following successful tape-out and testing, the project will advance through BEOL integration and extensive device characterisation to validate performance, reliability, and yield metrics required for commercial deployment.

The company also plans to deepen the fusion of RRAM technology with its proprietary neuromorphic IP portfolio, aiming to deliver transformative performance gains in wearable robotics, prosthetics, and autonomous sensing systems. This integration targets significant system simplification, sensor count reduction, and energy efficiency improvements, potentially reshaping the competitive landscape for edge AI hardware.

Bottom Line?

dorsaVi’s material validation milestone de-risks its 22nm RRAM scale-up, but commercial success hinges on upcoming tape-out and foundry integration outcomes.

Questions in the middle?

  • Will the 180nm tape-out meet performance and yield expectations to enable timely 22nm scaling?
  • How will dorsaVi’s RRAM and CIM integration compare with competing neuromorphic and edge AI memory technologies?
  • What partnerships or customer engagements will accelerate commercial adoption of dorsaVi’s smart sensor platform?